摘要
针对D触发器的抗单粒子辐射效应加固,提出了一种新型的保护门触发器(GGFF)设计,使用两个保护门锁存器串接成主从触发器。通过Spice仿真验证了GGFF抗SEU/SET的能力,通过比较和分析,证明GGFF对于具有同样抗SEU/SET能力的时间采样触发器(TSFF),在电路面积和速度上占据明显优势。
A novel guard gate flip-flop (GGFF) design was proposed for mitigating D flip-flop single event effects. Master-slave flip-flop was constructed by two guard gate latches connected in series. Spice simulation was utilized to verify that GGFF can mitigate SEU and SET. After comparison and analysis it can be proved that GGFF is much better in chip size and speed than temporal sampling flip-flop (TSFF), which can also mitigate SEU and SET.
出处
《半导体技术》
CAS
CSCD
北大核心
2009年第1期69-72,共4页
Semiconductor Technology
关键词
单粒子效应
D触发器
保护门
single event effects
D flip-flop
guard gate