摘要
模拟集成电路的"自顶向下"设计方法能大大提高电路设计效率。提出了一种"混合宏模型",能高效、简便地完成模拟集成电路的建模,进而指导器件级电路设计。基于"混合宏模型"的设计方法,完成了一款基于HHNEC 0.25μm标准CMOS工艺的无电容型LDO设计。
Top-down design flow can increase the efficiency of analog IC design. A technology of mix-macro-model was proposed for efficient and simple modeling of analog ICs, which may serve as a guide for device-level circuit design. By using this mix-macro-model technology, a capacitor-less LDO based on HHNEC 0. 25 um standard CMOS process was successfully designed.
出处
《微电子学》
CAS
CSCD
北大核心
2009年第1期90-93,100,共5页
Microelectronics
基金
国家高技术发展研究(863)计划资助项目(2006AA01Z226)
