适合SoC应用的片上集成输出电容快速响应LDO(英文)

Capacitor-Less Fast-Response LDO for SoC Applications

提出了适合SoC应用的片上集成输出电容快速响应低压差线性稳压器(LDO)。通过使用一种新颖的双向非对称缓冲器,消除了由LDO传输元件寄生电容产生的右半平面零点。该零点的消除不仅提高了LDO的稳定性,而且可以有效拓展其单位增益带宽,从而改善瞬态响应性能。基于该缓冲器的LDO,其相位裕度大于55°,单位增益带宽可达1.7 MHz,在负载电流以50 mA/μs的速度阶跃变化时输出电压变化量小于100 mV。

A low-dropout （LDO） voltage regulator with on-chip output capacitor for SoC applications is presented. The right-halfplane （RHP） zero generated by the gate-drain parasitic capacitance of the LDO pass element can be removed by a novel bidirectional asymmetric buffer （BDAB） . This RHP zero removal scheme can enhance the stability, increase the unit-gain frequency （UGF） and improve the transient response performance. Post-layout simulation results of the proposed LDO show that the phase margin is better than 55°, the UGF is up to 1.7 MHz, while the overshoot and undershoot of the output voltages are less than 100 mV when the load current changes at a rate of 50 mA/μs.