摘要
本文在分析低压TTL门按传统方式实现高速的困难之后,首先提出一个利用射极跟随器钳位和反馈电路组成的导通于放大状态低压TTL电路,并设计出延迟时间tpd<1ns的高速低压TTL与非门。接着进行电路分析和参数估算。用计算机模拟证明理论和电路的正确性。
After analyzing the difficulty to realize a high-speed and low-voltage TTL gate by tradition idea, a TTL circuits to turn on amplification-state by the using of emitter follower clamping-and-feedback circuit is presented and the high-speed and low-voltage TTL AND-NOT gate of delay-time tpd〈1ns is designed mainly in this paper. Secondly, a circuit analysis and parameter estimate are made out for reference to improve at high-speed and low-voltage. The theory and circuits are verified bv computer simulation
出处
《电路与系统学报》
CSCD
北大核心
2009年第1期106-110,共5页
Journal of Circuits and Systems
基金
电子工程黑龙江省高校重点实验室项目-黑龙江大学(ZDDZ2006-10)
黑龙江省教育厅科学技术研究资助项目(10531131)
关键词
高速低压TTL门
导通于放大状态
射极跟随器
钳位和反馈电路
high-speed and low-voltage TTL gate
turn on amplification-state
emitter follower
clamping-and-feedbackcircuit