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0.5umCMOS新型电流反馈放大器的分析与设计 被引量:1

Design And Analyse Of 0.5um CMOS Current-Feedback Op-Amps
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摘要 设计了一种CMOS电流反馈运算放大器,通过在输出端采用电阻反馈,增强带负载能力,利用MOS管实现串联电阻以消除补偿电容带来的低频零点,通过高输出阻抗镜像电流镜增大了电路的增益,并用共源共栅电流源为电路提供偏置电流以减小电源电压的变化对偏置电流影响。使用BSM30.5um CMOS工艺参数,PSPICE模拟结果获得了与增益关系不大的带宽,电路参数为:84.2dB增益,447MHz的单位增益带宽,62度的相位裕度,138dB共模抑制比以及在1V电源电压仅产生0.7mW的功耗。 This paper presents a new CMOS current-feedback operational amplifier based on the adoption of the resistance connecting across in order to improve drive capability, By using cascode circuit to improve the gain and the stablity.simulation results of the CFOA using BSM3's 0.5um CMOS process parameters with PSP1CE, result in a high slew-rate as well as bandwidth gain-independence. Circuit parameters show a: 84.2db open loop gain, 447MHz unity gain bandwidth, 62degree phase margin, 138db CMRR and power consumption around 0.TmW from 1V supply voltage.
出处 《微计算机信息》 2009年第5期305-307,共3页 Control & Automation
关键词 低压低功耗 高增益 电流反馈运算放大器 高共模抑制比 Low voltage and low power High Gain CFOA High CMRR
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参考文献8

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共引文献5

同被引文献7

  • 1Cheng-Chung Hsu and Jieh-Tsomg Wu. A 33-mw 100-mhz sample-and-hold amplifier. 2002 IEEE Asia-Pacific Conference on ASIC. 2002:169-172.
  • 2Samiran Hakler, Arindrajit Gboshi, A 160MSPS 8-bit Pipeline Based ADC, IEEE International Conf. On VLSI Design, 2005.
  • 3Devrim Aksin, Mohammad Al-Shyoukh. Switch Bootstrapping for Precise Sampling Beyond Supply Voltage. IEEE, J. Solid-State Circuits, 2006, 41(8):1938-1943.
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  • 7阮颖.低电压高速CMOS全差分运算放大器设计[J].现代电子技术,2008,31(11):150-152. 被引量:4

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