基于FPGA的嵌入式PLC微处理器设计

Design of Embedded PLC Processor Based on FPGA

目前利用FPGA设计高性能的嵌入式处理器已经成为SOC设计的重要部分,对一种基于FPGA芯片的嵌入式PLC处理器进行了研究和设计,并采用了基于VHDL语言的自顶向下的模块化设计方法,顶层设计使用原理图输入。最后用QuartusⅡ进行仿真,给出了主要仿真结果。实验表明,该处理器能准确且快速的响应嵌入式PLC的逻辑指令,且较传统的PLC处理器更灵活,集成度更高。

Using FPGA to design high-performance embedded processors is becoming an important part of SOC now.An embedded PLC processor based on FPGA is designed,the way of top-down and modular design with VHDL language is adopted.The top-level design uses the way of block diagram.At last it was simulated with QuartusⅡand the main simulation results are given.The test shows that the processors can respond precisely and immediately to the logic instructions of embedded PLC.It is more flexible and integrated compared with traditional PLC processors.