摘要
本文介绍了一种多通道全并行实时数据采集系统的设计原理。该系统中的每个采集通道由信号调理、A/D转换器和异步双口RAM组成,采用USB作为数据上传接口,使用复杂可编程逻辑阵列CPLD作为控制核心,将数据采集、缓冲及上传模块组织成流水线的构架。各个模块并行同步执行,从而保证采样数据的连续性,并使整个系统高速运行。实际测试显示该系统具有很好的稳定性和可靠性。
The design and implementation of a kind of multi-channel and real-time parallel data acquisition system has been introduced. In this system, each data acquisition channel consists of signal recuperates module, A/D Converter and asynchronous double ports static RAM. The system uses USB as an interlace to upload data, adopts CPI.D as the control core to make the data acquisition, data collection, data buffering and data upload module organized into pipelined architecture. Each module synchronous parallels implementation, which ensures the continuity of sampling data and high-speed operation of the entire system. The actual test result demonstrated that this system has the better stability and reliability.
出处
《萍乡高等专科学校学报》
2008年第6期37-40,共4页
Journal of Pingxiang College