基于FPGA的数字频率计VHDL软件实现方法

Realization of Digital Freguency Measurement System Based on FPGA

运用VHDL在FPGA/CPLD器件上实现一种数字频率计测频系统,分析了数字频率计软件构成结构,并对其中的测频控制信号发生器电路进行了VHDL软件编程实现。

This paper introduces the use of VHDL in the FPGA / CPLD devices on the realization of a digital frequency Measurement Systems, analysises the structure of a digital frequency meter software, and programs the software of frequency-control signal generator circuit in VHDL.