摘要
This work presents an ultra-high speed 2 : 1 multiplexer (MUX) in a SiGe BiCMOS technology with fT = 103 GHz. To boost the operating speed, the system scheme is optimized including a 2 : 1 selector circuit directly driving an external 50 Ω load, and two wide-band data buffers and one clock buffer in the input stage. The chip exhibited an open eye at 80 Gb/s with a 160 mV single-ended voltage swing.
This work presents an ultra-high speed 2 : 1 multiplexer (MUX) in a SiGe BiCMOS technology with fT = 103 GHz. To boost the operating speed, the system scheme is optimized including a 2 : 1 selector circuit directly driving an external 50 Ω load, and two wide-band data buffers and one clock buffer in the input stage. The chip exhibited an open eye at 80 Gb/s with a 160 mV single-ended voltage swing.