摘要
Since device feature size shrinks continuously, there appears various short-channel effects on the fabrication and performance of devices and integrated circuits. We present a vertical double gate （VDG） strained channel heterostrueture metal-oxide-semiconduetor-field-effect-transistor （MOSFET）. The electrical characteristics of the device with the effective gate length scaled down to 60nm are simulated. The results show that the drive current and transconductance are improved by 57.92% and 54.53% respectively, and grid swing is decreased by 36.83% over their unstrained counterparts. VDG MOSFETs exhibit a stronger capability to restrict short-channel-effects over traditional MOSFETs.
Since device feature size shrinks continuously, there appears various short-channel effects on the fabrication and performance of devices and integrated circuits. We present a vertical double gate （VDG） strained channel heterostrueture metal-oxide-semiconduetor-field-effect-transistor （MOSFET）. The electrical characteristics of the device with the effective gate length scaled down to 60nm are simulated. The results show that the drive current and transconductance are improved by 57.92% and 54.53% respectively, and grid swing is decreased by 36.83% over their unstrained counterparts. VDG MOSFETs exhibit a stronger capability to restrict short-channel-effects over traditional MOSFETs.
