SystemC在Turbo码实现和验证中的应用

Application and Verification of Turbo Codec with SystemC

在简述SystemC的设计方法和流程的基础上,针对SystemC在硬件芯片系统级设计和寄存器传输级设计的特点,以Turbo编码器为对象和开发目的,研究了SystemC基于寄存器传输级设计的可实现性,利用SystemC的模块化功能,通过分析Turbo编码器的结构与信号流图,进行建模仿真直到最后完成划分硬件模块与编程并在FPGA完成其实现与验证,充分证明了SystemC完全适用于基于寄存器传输级设计的IC应用。此外,此设计将系统级设计与寄存器传输级设计的工作合二为一,大大节省了开发的流程时间。

The paper introduces methods and flows of IC design using SystemC firstly. And then researches and implements a Turbo encoder with RTL design using SystemC according its functionality of SLD and RTL capability. To prove the RTL capability of SystemC especially, the paper analyzes the structure and signal flows of Turbo encoder, simulats the Turbo modeling＇until finally completes the hardware design and implements it on a FPGA platform using a simulation testbench for verification. It saves more design times because it merges the SLD and RTL design to one step.