2Randjic A, Ostapcuk N,Soldo I, et al. Complex ASICs Verification with SystemC. In: Proc. of the Int. Conf. on Microelectronics, Univ. of NIS, Yugoslavia, 2002-05:671-674
3Open SystemC Initiative(OSCI). SystemC Version 2 Documenta- tion. http://www.systemc.org
4Groat J D, Raman A, Younis B. A Design Project for System Design with SystemC. In: International Conference on MSE, Anaheim,CA,USA, 2003
5Economakos G,Oikonomakos P, Panagopoulos I. Behavioral Synthesis with SystemC. In: Proc. of the Conference on Design Automation and test in Europe, Munich, Germany, 2001:21-25
6Benini L, Bruni D, Drago N. Virtual In-circuit Emulation for Timing Accurate System Prototyping. In: Porc. of IEEE. Int. Conf. ASIC/.Soc, Bologna University, Italy, 2002
7Ghosh A, Tjiang S, Chandra R. System Modeling with SystemC. In: Proc. of the 4th International Conference on ASIC,Shanghai, 2001
8陈曦,徐宁仪.SystemC片上系统设计[M].北京:科学出版社,2003.120-121.
9Habibi A,Tahar S. Design for Verification of SystemC Transaction Level Models [A]. Proceedings of Design, Automation and Test in Europe[C]. Washington DC: IEEE Press, 2005:560 - 565.
10Jindal R,Jain K. Verification of TransactionLevel SystemC Models Using RTL Testbenches [A]. Proceedings of Formal Methods and Models for Co - Design [C]. Washington DC: IEEE Press, 2003 : 199 - 203.
2Bergeron Janick. Verification Methodology ManuaL For SystemVerilog[M].北京航空航天大学出版社,2007.
3Thomas L Anderson. Design intents raise verification level [m].Electronic Engineering Times .2001.
4Rashinkar, P.,Paterson,P.,Singh,L. System on a chip verification, Methodology and Techniques [m].Kluner Academic Publishers.2001.153.
5BRUCE A,GOODENOUGH J .Re_useable,hard- ware/software co-verification of IP blocks//Proc of 14th Annual IEEE Int ASIC/SOC Conf.Arligton,VA,USA, 2001:413-417.
6Jason R.Andrews. co-verification of hardware and software for ARM SOC Design.
