一种FSK数字解调器的结构与芯片设计

Architecture and ASIC Design for an FSK Digital Demodulator

设计了一种基于高性能频移键控(FSK)数字解调器的无线鼠标接收方芯片,该芯片整合了无线解调电路和接口控制电路,能够自动识别PS/2和USB接口。解调器采用一种新颖的全数字方案,包括抽取滤波器、数字锁相环(DPLL)、位时钟恢复和自动频率控制(AFC)等部分,可用于频移键控信号的解调。芯片采用SMIC0.35μmCMOS工艺流片,测试结果表明,解调器性能在Eb/No=8dB时,误码率为10-3,接收机灵敏度为-102dBm,同步范围≤±4.9%Rb(Rb为系统数据速率),AFC范围≤±32%Rb,这些特性完全符合无线鼠标接收机的要求。

A wireless mouse＇s receiver chip based on high-performance FSK demodulator is presented in this paper. The chip integrates wireless demodulation and interface control circuits, supporting adaptive PS/2 and USB port identification. The demodulator adopts a novel all-digital method. It comprises decimation filter, digital phase locked loop （DPLL）, bit timing recovery and automatic frequency control （AFC）. This chip is fabricated by using SMIC 0. 35um CMOS technology. The test results show that the demodulator performance has achieved BER= 10-3 when Eb/No= 8dB, receiver sensitivity=- 102dBm, Synchronization range≤±4.9%Rb （Rb： system data rate）, AFC range≤±32%Rb. These merits are very suitable for wireless mouse＇s receiver.