摘要
随着嵌入式应用快速发展,系统芯片(SoC)设计日趋复杂.高效可靠的设计多处理器系统芯片逐渐成为一个巨大挑战.本文提出一种多处理器原型及其SoC设计方法,将多处理器及其通信统一建模于一个多层次、灵活和可配的软硬件原型中,通过分层次、从高层抽象到底层实现逐步深入的方法解决软硬件接口验证问题和完善软硬件架构.H.264解码实验证明多处理器原型功能可行性和物理可实现性.基于该原型的多层次细化方法可有效确保SoC软硬件设计的正确性,并有助于软硬件结构协同设计优化.
Fast development of embedded application drives the SoC design more complex.How to design multiprocessor SoC efficiently and reliably is becoming a challenge to the designers.To address this challenge,a new multiprocessor prototype and its SoC design methodology are proposed in this paper.It combines multi processors and their communication into one software-hardware prototype in different abstraction levels.The method of seamless refinement from high level abstraction to low level VLSI implementation can design and verify the software/hardware interface and improve designing software/hardware architecture efficiently.The experiment of H.264 decoder shows the feasibility of multiprocessor prototype in both function and physical implementation.The seamless refinement method based on this prototype can ensure the correctness of SoC design and be helpful for its software/hardware architecture optimization.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2009年第2期305-311,共7页
Acta Electronica Sinica
关键词
多处理器原型
系统芯片
软硬件协同设计
multi-processor prototype
System on Chip(SoC)
software-hardware co-design