摘要
高速雷达数据采集系统的设计方法。该系统由FPGA芯片完成各芯片之间的逻辑控制,具有设计灵活、结构简单、实时性高、可靠性高等优点。
The design of high speed radar data sampling system is introduced in this paper. Logic control among chips in this system is implemented by FPGA（field programmable gate array）. This system has some characteristics： vivid design, sample construction,high real time function, high dependable etc.
出处
《电子技术应用》
北大核心
2009年第3期62-65,共4页
Application of Electronic Technique
