基于SoC设计的软硬件协同验证技术研究

Research of hadrwaer/software co-verification based on the SoC

软硬件协同验证是SoC设计的核心技术。其主要目的是验证系统级芯片软硬件接口的功能和时序[1],验证系统级芯片软硬件设计的正确性,以及在芯片流片回来前开发应用软件。本文介绍了基于SoC设计的软硬件协同验证方法学原理及其验证流程。然后分析了SoC开发中采用的3种软硬件协同验证方案,ISS方案、CVE方案、FPGA/EMULATOR方案,对其验证速度、时间精度、调试性能、准备工作、价格成本、适用范围等各方面性能做出比较并提出应用建议。

Hardware/software co-verification is the key technology of SoC. Its main purpose is verify the function and schedule of the interface between the hardware and software of the SoC, verify the correctness of the hardware and software design of the SoC, and develop the application software before the SoC tape out. This article recommend the principle of the co-verification approach and the verification flow based on the SoC design. Then analyze three co-verification project based on the development of SoC in common use,ISS project, CVE project, FPGA/ EMULATOR project, and compare their the verify speed, time precision, debug capability, prepare work and the cost, then put forward the applied advice.