期刊文献+

基于虚拟可及测试节点的模拟电路故障诊断 被引量:1

Fault Diagnosis in Analog Circuits Based on Virtual Accessible Testing Nodes
下载PDF
导出
摘要 针对网络撕裂方法诊断模拟电路故障过程中撕裂节点必须是可及节点的限制,提出了虚拟可及测试节点的方法。利用网络拓扑结构和基尔霍夫电流定律计算一类不可及测试节点故障电压,让其成为虚拟可及测试节点。然后在可及或虚拟可及测试节点对网络进行撕裂,再根据故障电压和故障判据定位故障至更小的区域,从而进一步定位故障元件。这种新方法降低了待诊断电路中对可及节点数目的要求,增加了撕裂的灵活性。通过仿真实例验证了该方法的有效性。 Against the limitation of tearing nodes that must be accessible in analog circuit diagnosis based on tearing technology, the method of virtual accessible testing nodes was presented. The virtual accessible testing nodes were transformed from the inaccessible nodes whose nodal voltages under faulty condition can be computed by topological structure and Kirchhoffs Current Law. The decomposition nodes could be either the accessible testing nodes or the virtual accessible testing nodes. According to faulty voltages and faulty criterion, locating of faulty sub-networks was implemented and faulty components could be located. The new method reduces the requirements for the number of accessible testing nodes and increases the flexibility of decomposition in analog circuit diagnosis. An example circuit was provided to validate the efficiency of the proposed method.
出处 《电光与控制》 北大核心 2009年第4期65-68,共4页 Electronics Optics & Control
基金 国家自然科学基金重点课题(60736026) "教育部新世纪优秀人才支持计划"资助项目
关键词 故障诊断 模拟电路 虚拟可及测试节点 故障电压 fault diagnosis analog circuit virtual accessible testing node faulty voltages
  • 相关文献

参考文献10

  • 1安治永,李应红,苏长兵.航空电子设备故障诊断技术研究综述[J].电光与控制,2006,13(3):5-10. 被引量:22
  • 2STARZYK J A, PANG J. Finding ambiguity groups in low testability analog circuits [ J ]. IEEE Trans on Cir- cuits and Systems-Ⅱ :Analog and Digital Signal Processing,2000,47 (8) :1125-1137.
  • 3HUANG J L, CHENG K T. Test point selection for analog fault diagnosis of un-powered circuit boards [ J ]. IEEE Trans on Circuits and Systems- Ⅱ: Analog and Digital Signal Processing,2000,47(10) :977-987.
  • 4HArrZOPOULOS A A, KONTOLEON J M. Fault diagnosis in large analogue circuits based on hybrid decomposi- tion [ J ]. IEE PROCEEDINGS-G, 1992, 139 ( 3 ) : 311- 318.
  • 5SALAMA A E, STARZYK J A. A unified decomposition approach for fault location in large analog circuits [ J ]. IEEE Trans on Circuit and Systems,1984,31:609-622.
  • 6STARZYK J A, LIU D. A decomposition method for analog fault location[ C ]//Proceedings of the IEEE Interna- tional Symposium of Circuits and Systems(ISCAS) ,Scottsadale, Arizona, USA ,2002,3 : 157-160.
  • 7TADEUSIEWICZ M, HALGAS S, KORZYBSKI M. An algorithm for soft-fault diagnosis of linear and nonlinear circuits [ J ]. IEEE Trans on Circuits and Systems-I : Fundamental Theory and Applications, 2002, 49 ( 11 ) : 1648-1653.
  • 8HE Yigang, Tan Y, SUN Y. A neural network approach for fault diagnosis of large-scale analog circuits[ C]//Proc IEEE ISCAS, phoexix, USA,2002 : 153-156.
  • 9厉芸,何怡刚,徐卫林,尹新,刘美容.基于BP神经网络的大规模电路模块级故障快速诊断方法[J].电路与系统学报,2005,10(4):12-15. 被引量:9
  • 10CHEN Y. Experiment on fault location in large-scale analog circuits [ J ]. IEEE Trans on Instrumentation and Measurement, 1993,42 ( 1 ) :30-34.

二级参考文献20

  • 1马红光,韩崇昭,孔祥玉,王国华,许剑锋,朱小菲.基于Lyapunov指数的非线性模拟电路故障诊断方法[J].电路与系统学报,2004,9(4):71-75. 被引量:7
  • 2崔莼.[D].西安交通大学,1996.
  • 3Bandler J W, Salama A E. Fault diagnosis of analogue circuits [J]. Proceedings of IEEE, 1985, 73(8): s1279-1327.
  • 4Salama A E, Starzyk J A, Bandler J W. A unified decomposition approach for fault location in large analog networks [J]. IEEE Trans. CAS.,1984, CAS-31(7): 609-621.
  • 5Navid N, Willson A N. A theory and an algorithm for analog circuit fault diagnosis [J]. IEEE Trans. on Circuits Syst., 1979, CAS-26:609-621.
  • 6He Yigang, Tan Y, Sun Y. A neural network approach for fault diagnosis of large-scale analog circuits [A]. Proc. IEEE ISCAS [C], phoexix,USA. 2002. 153-156.
  • 7He Yigang , Sun Yichuang. A newral-based nonlinear L1-norm optimization approach for fault diagnosis of nonlinear circuits with to lerance[J]. IEEE proceedings circuits, Devices and systems, 2001, 148(4): 223-228.
  • 8He Yigang, Tan Yanghong, Sun Yichuang. Class-based neural network method for fault location of large-scale analog circuits [A], Proc. IEEE Int. Syrup. Circuits & Systems'2003 [C]. BangKOK, Thiland, 2003, 5: V733-736.
  • 9He Yigang , Sun Yichuang. Fault isolation in nonlinear analog circuits with tolerance using the neural network based L1-norm. [A]. Proc.IEEE Int. Symp. Circuits & Systems'2001 [C]. Australia, Sydney, 2001-05. 854-857.
  • 10程明华,姚一平.动态故障树分析方法在软、硬件容错计算机系统中的应用[J].航空学报,2000,21(1):34-37. 被引量:17

共引文献29

同被引文献8

引证文献1

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部