期刊文献+
任意字段
题名或关键词
题名
关键词
文摘
作者
第一作者
机构
刊名
分类号
参考文献
作者简介
基金资助
栏目信息

一种用于LDO的BiCMOS带隙基准

A BiCMOS Bandgap Reference for LDOs
下载PDF
导出
摘要 提出了一种基于传统基准源的改进带隙基准.该电路采用0.6μm BiCMOS工艺实现,用于低压差线性稳压器.由于没有使用运算放大器以及非线性补偿技术,因此,该基准电路结构简单,面积小,电源电压为2.5 V时功耗低达12.5μW。在-40～125℃温度范围内温度系数为22.2×10-6/℃,线性调整率为0.01%/V。当外接0.47μF的滤波电容后,在1 kHz频率时电源抑制比为135 dB,在200 Hz和100 kHz频率时噪声功率谱密度分别为7.4 V/Hz和6.7 pV/Hz。 A BiCMOS bandgap reference,which is an improved version of the traditional voltage reference,is presented.The bandgap reference is designed for low dropout linear regulators and has been implemented in a 0.6 μm BiCMOS technology.Without using op amps and curvature compensation techniques,the proposed bandgap circuit is thus very simple and occupies small area on the chip and the power dissipation is as low as 12.5 μW with a 2.5 V power supply.A typical temperature coefficient of 22.2×10-6/℃ is achieved in the temperature range from-40℃ to 125℃,and the line regulation is 0.01%/V.With a 0.47 μF filtering capactitor the power supply rejection ratio is 135 dB at 1 kHz and the noise density is 7.4 nV/Hz and 6.7 pV/Hz at 200 kHz and 100 kHz,respectively.
作者 常昌远 赵宁 刘正军
机构地区 东南大学微电子中心
出处 《电子器件》 CAS 2009年第1期68-71,共4页 Chinese Journal of Electron Devices
关键词 BiCMOS带隙基准 低压差稳压器 运算放大器 BiCMOS Bandgap Reference Low Dropout Regulator Op amp
分类号 TN402 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献10

  • 1Gray P R and Meyer R G, Analysis and Design of Analog Integrated Circuits [M]. 4thEdition, New York: John Wiley Sons, 2001.
  • 2Leung K N and Mok P K T, A Capacitor-Free CMOS Low- Dropout Regulator With Damping-Factor-Control Frequency Compensation[J]. IEEE J. Solid-State Circuits, Oct. 2003, 38 (10):1691-1702.
  • 3Rineon-Mora G A and Mien P E, A Low-Voltage, Low Quiescent Current, Low Drop-Out Regulator[J]. IEEE J. Solid- State Circuits,Jan. 1998,33(1) :36-44.
  • 4Widlar R J, New Developmentin IC Voltage Regulators [J]. IEEE J. Solid-State Circuits, Feb. 1971, SC-6, ( 1 ) : 2-7.
  • 5Brokaw A P. A SimpleThree-Terminal IC Bandgap Reference [J]. IEEE J. Solid-State Circuits, Dec. 1974,SC-9(6) :388-393.
  • 6Tham K M and Nagaraj K,A Low Supply Voltage High PSRR Voltage Reference in CMOS Process[J]. IEEE J. Solid-State Circuits,Dee. 1974,30(6) :388-393.
  • 7Bajdechi O and Huijsing J H, A 1.8-VModulator Interface for an Electret Microphone with On-Chip Reference [J]. IEEE J. Solid-Satate Circuits, Mar. 2002,37(3) : 279-285.
  • 8Degrauwe M G R, et aI,CMOS Voltage Reference Using Lateral Bipolar Transistors[J]. IEEE J. Solid-Satate Circuits, Dec. 1985, SC-20(6) : 1151-1157.
  • 9Vittox E and Fellrath J. CMOS Analog Integrated Circuits Based on Weak Inversion Operation[J]. IEEE J. Solid-State Circuits,June 1977,SC-12(3) :224-231.
  • 10Tsivedis Y P and Ulmer R W, A CMOS Voltage Reference [J]. IEEE J. Solid-State Circuits, Dec. 1978, SC-13 (6) : 774- 778.
电子器件
2009年 第1期

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部