CMOS电路开关级测试生成

Test Generation at Switch Level for CMOS Circuits

本文讨论CMOS静态组合电路开关级上的测试生成方法。我们将D算法推广到开关级上,提出一种稳定的(robust)测试生成算法,可用于检测CMOS电路的晶体管开路故障。一个实验性的MOS电路开关级测试生成程序MOSTEGX已在VAX 11/750上实现。

This paper discusses the test generation of CMOS static combinational circuits at switch level. We extend the D-algorithm to the switch level and propose a robust test generation algorithm for detecting transistor stuck-open faults of CMOS circuits An experimental switch-level MOS test generation program MOSTEGX has been implemented on VAX 11/750.