摘要
给出了以太网交换芯片的I2C接口模块的设计方案;用VHDL语言给出I2C接口模块的FPGA设计的验证和仿真;对仿真结果进行分析比较,验证了I2C接口模块设计的正确性;对程序进行了优化。最后说明设计的I2C接口模块可以作为一个软核来使用。
The paper proposed the design of I^2C interface for Ethernet Switch Chip,and presented the validation and simulation of FPGA design I^2C interface part using VHDL language, and then analyzed and compared the results of simulation, validated the result of the design of I^2 C interface part is correct, and at the same time, optimized the program. The designed I^2C interface part can be used as a Soft Core.
出处
《西安科技大学学报》
CAS
北大核心
2009年第2期236-239,共4页
Journal of Xi’an University of Science and Technology