基于FPGA的可重构处理单元研究

Study of Reconfigurable Process Union Based on FPGA

面对大量差异化用户业务的规模化应用,定制处理器组成方式的柔性结构得到越来越多的关注。文章在FPGA的基础上提出了可重构路由器中核心处理单元的设计模型,它将应用分为多个处理组件,通过各处理组件之间的状态机,实现组件间对应的数据传输和控制。在此基础上,一部分的组件在空间上被映射为可重构单元,并且被组装为与各种状态对应的构件,同时还在Virtex FPGA上讨论了该模型的实现方案。

There are differences in the face of a large number of users of large-scale business applications, and customizable processor attracted an increasing number of people to concern about. So the design model based on FPGA for the Process Union of Reconfigurable Router is proposed as follow, at first applications are put into several components, and components communicate by the star machine. The second part of the components can be mapped for reconfigurable unit, and assembled with a variety of states for the corresponding unit. At last an implementation of reconfigurable process union on the Virtex FPGA is discussed.