摘要
本文提出一种性能驱动的MCM划分神经学习方法.新算法具有如下特点:(1)允许功能设计和布图设计同时进行,(2)划分时,不仅考虑了模块间的逻辑关系,还考虑了MCM的版图结构.(3)具有芯片间连线数目最少和时钟周期最短双重优化目标.(4)能使连线尽可能产生在相邻近的芯片之间.(5)网络的结构合理,学习速度快.
In this paper, we propose a neural learning approach for performance-driven partitioning on multichip modules. our method is unique in (1) allowing simultaneous design in logic and layout. (2) considering both logical relation between modules and physical structure of MCM.(3)having double optimal object, minimizing number of connections between chips and cycle time of system. (4) making connections occur between chips as close as possible. (5)making the structure of neural network reasonable and training speed rapid.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1998年第5期75-78,共4页
Acta Electronica Sinica
基金
国家"九五"科技攻关项目
关键词
MCM划分
神经网络
IC
制造工艺
logic and layout combined, Partitioning on MCM, Neural network