摘要
合理的设计二级Cache是有效地减少多核多线程处理器存储器访问延迟的方法。针对现有的多核多线程处理器,讨论了二级Cache的混合预取结构设计方案。通过详细设计和仿真分析,结果表明混合预取结构可有效提高处理器的整体性能。特别是采用不命中混合预取结构的二级Cache性能更佳,适合满足此类结构的多核多线程处理器需求。
The effective way of reducing memory accessing delay of the multi-core multi-thread processor is to design L2 Cache reasonable.This paper aims at the present multi-core multi-thread processor, then discusses the design project of mixed-prefetch structure of L2 Cache.By particular design and simulation analyses,it indicates that mixed-prefetch structure can improve the performance of processor remarkably.Furthermore, mixed-prefetch structure with prefetch under miss strategy suits the multi-core multi-thread processor much better,which meets the requirement of the multi-core multi-thread processor with this structure.
出处
《计算机工程与应用》
CSCD
北大核心
2009年第10期69-71,91,共4页
Computer Engineering and Applications
基金
国家自然科学基金重点项目No.60736012
国家自然科学基金No.60773223~~
