衰落信道上FEC设备的硬件实现方法

Hardware Implementation of FEC over the Fading Channel

文中首先介绍了ＦＥＣ设备中ＢＣＨ（３１，２１）码的编码电路，然后在Ｅ．Ｈ．Ｌｕ等所提出的新的ＢＣＨ码译码算法的基础上，详细介绍了ＢＣＨ（３１，２１）码译码器和交织器的ＣＰＬＤ设计与实现技术。

This paper describes the hardware implementation of the FEC equipment on the fading channel,with emphasis on the design of the BCH decoder and the block interleaver.A new implementation method of the interleaver is proposed.Simulation results show that the FEE chip based on the CPLD is very simple and fast.