基于SOPC的LCD控制器IP核的设计与实现

Design and implementation of LCD controller IP core based on SOPC

介绍了一种针对LCD控制器IP核的设计方法该方法以Altera的软核处理器Nios Ⅱ为核心,通过对Avalon主端口的使用成功实现了对帧缓存读操作的硬件加速,并且本IP核以参数化概念设计,大大提高了控制器的可复用性。设计生成的LCD控制器IP核可以非常容易地添加到SOPC系统中,简化了底层编程人员对LCD屏的操作。实验结果表明,该设计具有较强的实用性和通用性。

A method of designing a LCD controller IP core is introduced. With the Altera Nios Ⅱ as the core part, the hardware acceleration of frame buffer reading process is implemented by using Avalon master port. This IP core is designed in the concept of parametric, which improves the reusability of the controller. The LCD controller IP core designed is extraordinary convenient to add to the SOPC systems, which simplified the operations of the programmers at the bottom level. Experiments prove the design are very powerful in practicality and commonality.