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基于数字序列划分的DDFS技术研究 被引量：2

Study of DDFS based on digital sequence division
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摘要 详细介绍并分析了一种有效压缩直接数字频率合成器(DDFS)的ROM使用量的新理论——数字序列划分法。比较分析了相位序列长度为16bits时不同分割减少ROM使用量的效果。详细叙述了用数字序列划分实现DDFS所需的存储器个数及各存储器存储的数据来源。最后推导分析了数字序列划分法应用于DDFS可能引入的误差及大小,推导了误差与分割数之间的关系,并用MATLAB仿真验证了两者之间的关系。得出在一定误差范围内数字序列划分法应用于DDFS能有效减少ROM使用量的结论。 The paper presented a detailed description of a new theory i. e. digital sequence division, which was a salient ROM compression technique for direct digital frequency synthesizer, and compared ROM compression of different division for 16-bit phases sequence. The paper described the number of memory and the date stored in the memory for DDFS based on digital sequence division. Also the paper analyzed the errors that might be produced by the application of digital sequence division to DDFS, and deduced the relationship between error and division, and the simulation experiments proved the relationship with MATLAB. At last, the conclusion was that the digital sequencedivision could compress ROM size saliently for DDFS in the certain range of error.
作者 陆斌斌 孙震
机构地区 哈尔滨工业大学自动化测试与控制研究所
出处 《电子测量与仪器学报》 CSCD 2009年第3期93-98,共6页 Journal of Electronic Measurement and Instrumentation
关键词 数字序列划分 直接数字频率合成器 ROM压缩 digital sequence division DDFS ROM compression
分类号 TP301.6 [自动化与计算机技术—计算机系统结构]
  • 相关文献

参考文献8

  • 1DE CARO D, STROLLO A G M. High-performance direct digital frequecy synthesizers using piecewise-polynomial approximation[ J ]. IEEE Trans. Circuits Syst. , 2005,52 (2) :324-337.
  • 2陆斌斌,孙震.基于泰勒级数线性插值的DDFS研究[J].电子测量技术,2008,31(10):21-23. 被引量：2
  • 3LANGLOIS J M P, KHALILI D A. Novel approach to the design of direct digital frequency synthesizers based on linear interpolation [ J ]. IEEE Trans. Circuits Syst. II : Analog Digit. Signal Process, 2003,50 (9) :56-578.
  • 4MADISETTI A, KWENTUS A Y,WILKSON A N. A 100 MHz, 16 B, direct digital frequency synthesizer with a 100dBc spurious-free dynamic range [ J ]. IEEE J. Solid- State Circuits, 1999,34( 8 ) : 1034-1043.
  • 5STROLLO A G M,CARO D D,PETRA N. A 630 MHz,76 mW direct digital frequency synthesizer using enhanced ROM compression technique [ J ]. IEEE J. Solid-State Circuits, 2007,42 ( 2 ) : 350-360.
  • 6NICHOLAS H T,SAMUELI H. A 150 MHz direct digital frequency synthesizer in 1.25-micron CMOS with 90dBc spurious performance [ J ]. IEEE J. Solid-State Circuits, 1991,26(12) : 1959-1969.
  • 7DINECHIN F,TISSERAND A. Multipartite table methods [ J]. IEEE Trans. Comput. ,2005,54( 3 ) :319-330.
  • 8SCHULTE M J, STINE J E. Approximating elementary functions with symmetric bipartite tables [ J ]. IEEE Transactions on computers, 1999,48 ( 8 ) :842-847.

二级参考文献8

  • 1马骏然,张春熹.基于FPGA的直接数字频率合成波形发生器[J].电子测量技术,2006,29(4):78-79. 被引量：24
  • 2TIEMEY C. A digital frequency synthesize[J].IEEE Trans. Audio Electroacoust, 1971 ,8(19) :48-57.
  • 3BRAMBLE A L. Direct digital frequency synthesis [J]. Proc. 35th annual Frequency Control Symposium, 1981,07703:406-414.
  • 4MOHAMED M, SAID MME. An improved ROM compression technique for digital frequency synthesizers [J].IEEE Trans. Audio Electroacoust 2002 ,5(5) :437 -440.
  • 5BEI.LAOUAR A. Low-power digital frequency synthesis for wireless communications [J]. IEEE J. Solid-State Circuits, 2000,35(3) : 385-390.
  • 6VANKKA J. Methods of mapping from phase to sine amplitude in digital synthesis [J].IEEE Trans. ulterasonics, ferroelectrics, and frequency control, 1997,44(2) :526-534.
  • 7TAN L K, SAMUELI H. A 200MHz quadrature digital synthesizer/mixer in 0. 8pm COMS[J]. IEEE J. Solid-State Circuits, 1995, 30 (3):193-200.
  • 8孟玉洁,贾怀义,陶成.DDS中几种关键的ROM压缩方法[J].天津通信技术,2004(1):37-39. 被引量：12

共引文献1

同被引文献22

  • 1尹仲琪,黄凯冬,胡勇,黄坤超.最小二乘法对群时延测量的改善[J].电子测量与仪器学报,2009,23(S1):364-367. 被引量：5
  • 2梁志国,李新良,连大鸿.激光干涉法一次冲击加速度校准[J].电子测量与仪器学报,2006,20(1):68-72. 被引量：7
  • 3郭凤霞,张义军,言穆弘,赵阳.青藏高原雷暴云降水与地面电场的观测和数值模拟[J].高原气象,2007,26(2):257-263. 被引量：20
  • 4XIN R,ZHANG X T. An area optimized direct digital frequency synthesizer based on improved hybrid CORDIC algorithm[J]. Proceedings of IWSDA'07, 2007,243-246.
  • 5VOLDER J E. The CORDIC trigonometric computing technique[J].IRE Transactions on Electronics Computers, 1959, EC-8(3), 330-334.
  • 6De CARO D, PETRA N, STROLLO A G M. Digital synthesizer/mixer with hybrid CORDIC-multiplier architecture:error analysis and optimization[J]. IEEE Transactions on circuit and systems-I: regular papers, 2009,56(2) ,364-373.
  • 7CARO D. D, PETRA N, STROLLO A G M. A 380 MHz direct digital synthesizer/mixer with hybrid CORDIC architecture in 0. 25μm CMOS[J]. IEEE J. Solid-State Circuits,2007,42(1) :151-160.
  • 8WANG S, P1URI V, SWARTZLANDER E E. Hybrid CORDIC algorithms[J]. IEEE Trans. Comput, 1997,46 (11): 1202-1207.
  • 9YONG K C,SWARTZLANDER E E. Digit pipelined direct digital frequency synthesis based on differential CORDIC [J]. IEEE Transactions on Circuits and Systems I:Regular Papers,2006, 53(5), 1035-1044.
  • 10HU X B,BASS S C. A neglected error source in the CORDIC Algorithm[J]. IEEE Trans. Comput, 1993, 766-769.

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电子测量与仪器学报
2009年 第3期

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