摘要
循环冗余校验码CRC编译码方法简单,检错、纠错能力强,误判概率低,已成为各种差错控制中最常用的一种编码检验方式。介绍了基于字节的CRC编码原理及校验规则,使用硬件描述语言VHDL实现CRC编码,完成了CRC编码器的FPGA实现。
Because of its simplicity and efficiency, CRC has often been used in error control. A method of fast CRC calculation based on bytes is introduced. This paper also includes the design and simulation of CRC coder based on FPGA using VHDL.
出处
《微处理机》
2009年第1期86-88,共3页
Microprocessors
关键词
循环冗余校验
基于字节
FPGA实现
Cyclic Redundancy Code
Based on bytes
FPGA implementation
