摘要
介绍了一种基于FPGA的高速单神经元自适应PID智能控制器的设计方法。首先对单神经元PID控制的原理和设计中使用的算法进行分析,然后,对控制器进行VHDL分层设计,设计模块主要包括权值修改模块、误差计算模块、权值产生模块和输出模块。在设计中主要对乘法模块和加法模块进行介绍,并对各个模块进行了优化的处理。仿真结果表明该方案是可行性,而且本文的设计利用的硬件资源少,也有很快的运行速度。同时改善了传统PID控制器的控制性能。
A high-speed Single Neuron PID Intelligent Control Based on FPGA is introduced. At first, Single Neuron PID controller' s principle and PID algorithm are introduced. Then, the VHDL hierarchal design of the controller is carried out. The design includes four part is modify of weight, error, weight and output module. The adder and multiplier module is introduced in this paper, and the design has been optimized. Simulation results show the feasibility of the method. Meanwhile the design not only has less hardware resources, but also the speed is quick. The design has a much better performance than the custom PID controller.
出处
《微计算机信息》
2009年第10期50-51,281,共3页
Control & Automation