基于NIOSⅡ的视频叠加电路设计与实现

Design and implementation of video overlay circuit based on embedded NIOSⅡ

介绍基于NIOSⅡ嵌入式视频叠加电路的设计与实现。嵌入式NIOSⅡ CPU控制电路接收矢量视频信号及标准PAL制视频信号,使其相叠加后存储于双端口RAM,上位机通过PXI总线接口将双端口RAM中数字视频信号采集至内存,并通过软件将叠加后的视频信息回放。实验证明,该电路能有效完成视频叠加,并成功应用于某测试系统。

This paper introduces the design and implementation of video overlay circuit based on embedded NIOS Ⅱ .Circuit receives vector video signals and standard PAL video signals are overlayed and stored to dual-port RAM by embedded NIOS Ⅱ CPU. The PC transfers the digital video signal in dual-port RAM to memory through the PXI bus interface, and playback through software. The testing experiment shows that the circuit can realize video overlay and is used to test system.