基于FPGA中CLB结构模型的内部进化及其容错

The Intrinsic Evolution and Fault Tolerance Based on CLB Structure Model of FPGA

内部进化是研究在线可进化硬件的方法,可用于实现容错、自适应的航天器硬件系统。现场可编程门阵列(FPGA,Field Programmable Gate Array)是目前实现数字电路进化的主要可编程逻辑器件。本文分析了FPGA的结构特点,对其基本组成单元可配置逻辑块(CLB,Configurable Logic Block)的结构进行了简化,提出一种可编程逻辑器件模型,设计了一种基于该模型的内部进化方法,并实现了一个内部进化系统。采用故障注入的方法对内部进化的容错特性进行了研究,讨论了可进化硬件实现容错的条件。

The evolvable hardware is the combination of evolutionary computation and computer hardware technology. The intrinsic evolution is to investigate the evolvable hardware on -line, which is applicable to the implementation of fault tolerant, intelligent and adaptive spacecraft hardware systems. FPGA is an important programmable logic device that is used to implement digital circuit evolution. In this paper, the structural features of FPGA are analyzed, and a programmable logic device model is presented by simplifying the CLB, which is the elementary construction unit of FPGA. An intrinsic evolution method is proposed based on the presented model and an intrinsic evolution system is constructed. The fault injection method is adopted to study the inherent fault tolerance of the intrinsic evolution system. As a result, the condition for the evolvable hardware （EHW） to perform fault tolerance is presented.