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UWB系统中(解)交织器低复杂度的实现 被引量:2

Implementation of Low-complexity for(De)-Interleaver in UWB System
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摘要 提出一种低复杂度的(解)交织器现场可编程门阵列实现方法,采用XilinxFPGA自带的双端口存储器,能有效降低FPGA资源的消耗,且输入位宽和输出位宽无需相同,适用于多带正交频分复用超宽带系统。实验结果表明,系统所占用的slices数目对于交织器和解交织器来说分别降低了46%和78%。 A novel method to implement low-complexity Field Programmable Gate Array(FPGA) for (de)interleaver is proposed, which uses dual-proted memory of Xilinx FPGA. The consumption for resources to FPGA is reduced and the read-width is not necessarily equal to write-width. It is fitting to Multi-Bandwidth Orthogonal Frequency Division MultipIex(MB-OFDM) Ultra-Wide Bandwidth(UWB) systems. Experimental results show the numbers of occupied slices are reduced by 46% and 78% for interleaver and deimerleaver respectively.
出处 《计算机工程》 CAS CSCD 北大核心 2009年第7期217-219,共3页 Computer Engineering
基金 2006年上海应用材料研究发展基金资助项目(06SA15) 2006年英特尔博士生论文基金资助项目(2006071) 2007年上海市科委集成电路设计(SDC)专项基金资助项目(077062005)
关键词 正交频分复用 超宽带 现场可编程门阵列 Orthogonal Frequency Division Multiplex(OFDM) Ultra-Wide Bandwidth(UWB) Field Programmable Gate Array(FPGA)
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参考文献4

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同被引文献9

  • 1迟永钢,王芳.基于PSWF的超宽带通信系统最佳波形设计[J].南京邮电大学学报(自然科学版),2006,26(2):43-46. 被引量:10
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  • 9Liu Liang,Ye Fan,Ren Junyan.Digital Base Band Implementation for MB-OFDM UWB System[C] //Proc.of Conference on ASIC Design for Communication System.Shanghai,China:[s.n.] ,2009.

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