基于ITU标准的CRC加卷积编码器的FPGA设计

A FPGA Design of CRC and Convolution Encoder Based on ITU Standards

目前,多数低速数字通信系统中的信道编码器采用分离的CRC和卷积编码器来进行软硬件实现,然而为尽量确保可靠性,常将以上两种编码组合构成复合编码器,同时硬件实现也较软件实现更为优越。基于ITU标准,本文介绍了CRC加卷积编码器的FPGA设计方案。

Currently,most channel coding system in low-speed digital communications used for separation of the CRC and convolution encoder is achieved by using hardware and software, but to try to ensure reliability, Often combinated of these two kinds of encoding composite encoder, and so on.Compared to software,hardware achieved a more advantageous. Based on ITU standards, the paper introduced the FPGA design of CRC and the convolution encoder.