面向SoC的软硬件协同验证平台设计

Design of HW/SW Co-verification Platform for SoC

针对SoC设计验证的实际需求,介绍一种面向SoC设计的软硬件协同验证平台。平台中软硬件模型分别在不同环境下运行,通过网络实现信息交互。硬件用硬件描述语言实现对系统事务级、RTL级的建模,软件用高级编程语言来编写,使用指令集仿真器完成对硬件的仿真。仿真过程使用不同的进程并行进行,应用进程间通信方式实现仿真器之间的信息交互。

With respect to the software and hardware verification requirement of SoC design, a HW/SW co-verification platform is presented. On the platform, HW/SW model is run in different circumstance and information transform is realized through network. The hardware uses HDL to construct HW model, and it implements model of transaction and RTL level. The software uses high level program language accomplished and the simulator based ISS implementation simulation of the hardware. The simulate process executes parallel in different progress and communication through IPC.