摘要
针对数据加密算法的硬件设计,主要讨论了一个基于PCI总线的数据加密系统的设计与实现过程。首先对系统体系结构以及在FPGA芯片内部对PCI接口模块的实现进行了分析,然后,采用硬件描述语言描述3DES算法、PCI接口模块及控制模块,重点是在FPGA芯片内部的加解密模块部分对3DES加密算法进行了硬件平台上的设计与实现,即通过硬件描述语言和EDA开发平台将3DES算法实现到FPGA当中,作为一个主要的功能模块完成了对数据的加解密过程。此外,对系统的主要功能部分还进行了一些仿真测试。结果表明,加密系统性能稳定、结构可靠。
In view of the data encryption algorithm's hardware design, mainly discussed base on the PCI bus data encryption system designs and realizes process. First, The system architecture and FPGA chip in the internal PCI interface module for the realization of the analysis, then, used the hardware description language to describe the 3DES algorithm, the PCI interface module and the control module, the key point is on FPGA chip within the encryption and decryption Module part of the 3DES encryption algorithm for the hardware platform on the design and realizes, through the hardware description language and EDA development platform will be 3DES algorithm to FPGA, as a major function modules completed a data encryption and decryption process. Furthermore, the main functions of the system is also part of a number of simulation and testing. The results showed that the encryption system performance is stable, the structure is reliable.
出处
《微计算机信息》
2009年第12期103-105,共3页
Control & Automation