低信噪比下的比特同步设计

Design of Bit Synchronization at Low SNR

比特同步性能设计未有可直接引用的公式且其公式推导繁难,故而工程设计常停留在工程经验层面。针对此问题,以平方律检波比特同步设计为例,在高斯白噪声信道条件下,分析了其功率谱密度,推导了其输出信噪比表达式,总结了影响比特同步性能改善的因素,并在分析结果基础之上,给出了低信噪比下的比特同步设计方法,这对工程设计有着重要的指导意义。

There is no quick reference to bit synchronization performance design which is complex to deduce, so, project designs are usually based on project experiences. Aiming at this question, the power spectral density is analyzed under the channel condition of Gauss white noise, and the improvement of bit synchronization performance is summarized with the design of square-law detection bit synchronization as an example. Based on the analyzed results, the method of bit synchronization design is proposed under the condition of low SNR, which has great significance to project design.