基于FPGA的一维DCT算法设计与实现

Design and implement of 1D-DCT algorithm based on FPGA

介绍了一种8点一维DCT的优化算法,并在FPGA上进行设计实现.通过采用流水线设计、移位相加乘法器等措施,有效地减小了FPGA的资源占用量,提高了运算速度,并在MaxPlus Ⅱ软件上进行了仿真和性能分析,验证了该设计的有效性和正确性.

An improved algorithm of 8 bit 1D-DCT is introduced, and is designed on FPGA. The design takes some measures, including the addition of the pipelines and the use of the shift-adding multipliers, which effieiently reduces the occupation of the hardware resourees and speeds the operation. The simulation of proeess and analysis of the performanee are provided by the MaxPlus Ⅱ software to prove the correetness and effieieney of this design.