摘要
本文介绍了一个面向非扫描设计的实用的ASIC测试生成和可测性分析系统—ATG-TA.它采用功能块组同步时序电路模型和功能块引腿固定故障模型.可接收四种常用语言描述的电路网表.用FDCM方法引导测试生成过程,用DRFM方法识别组合冗余故障,通过测度分析与规则判定相结合识别时序电路中的不可测故障.用G-F二值算法按有限回溯测试模式产生方法推导测试向量.反向追踪时,采用宽度和深度动态交替代先策略.ATGTA已实际用于四万门以内的非扫描单双向ASIC芯片,效果良好.
This paper introduces a practical ASIC test generation and testabilityanalysis system,ATGTA,which is designed for non-scanning VLSI and uses syn-chronizing sequential circuit model with functional block as basic logical unit andstuck-at fault model for functional block pins. ATGTA can process user's circuitnet lists described by the four regular languages. ATGTA uses FDCM method toguide the test generation process,uses Dynamic Restrictive Four-valued Measure torecognize composite redundant fault and, by means of combining the testability mea-sure analysis and rule decision,recognize the untestable fault in sequential circuit.G-F binary value algorithm and finite backtrack test pattern generation method beused in generate test vector. When driving backward, according to the alternatewidth-first and depth-first tactics. ATGTA has applied to non-scanning single-di-rection and double-direction ASIC chips with scale of less then 40,000 gates,its ef-fect is excellent.
出处
《计算机学报》
EI
CSCD
北大核心
1998年第5期448-455,共8页
Chinese Journal of Computers
基金
国家自然科学基金
关键词
ASIC
专用集成电路
测试生成
可测性分析系统
Dynamic testability measure analysis, generation of finite backtrack test pattern, alternate width-first and depth-first, dynamic implicit functional block