一个有效的通路时滞故障测试生成系统DTPG

DTPG: AN EFFICIENT TEST GENERATION SYSTEM FOR PATH DELAY FAULTS

本文提出了一种两向量测试模式下的通路时滞故障分类，并在此基础上设计并实现了一个有效的通路时滞故障测试生成系统DTPG，该系统可识别强健可测通路、非强健可测通路和功能可敏化通路．DTPG用通路标识值来表示通路，并用一个位表结构的通路信息表来存储通路测试信息．实验结果表明，DTPG在利用内存上是有效的，可以为通路数较大的电路（如C3540）产生时滞测试向量对．

In this paper, functional sensitizable path delay faults is defined undertwo-vector testing mode, with which a classification of path delay faults under two-vector testing mode is proposed. Under the classification, an efficient test genera-tion system for path delay faults, DTPG, is developed. DTPG identifies robusttestable, non-robust testable, and functional sensitizable paths, and generates atesting or sensitizing vector pair for a testable or sensitizable path. The amount ofpath delay faults in a circuit is usually very large. Therefore, it is essential for atest generator of path delay faults to adopt an efficient method to keep the test gen-eration information. In DTPG, path identifier is used to represent a logic path.Furthermore, an efficient bit table, path information table, is proposed to store thetest generation information for the path delay faults of the circuit. DTPG is basedupon lO-value and 3-va1ue logic. It adopts a lot of techniques that are widely usedin some traditional test generator f0r stuck-at faults, such as FAN system. Experimental results show that DTPG is memory efficient. It generates tests for the circuit with large number of path delay faults, such as C3540.