基于DSP和FPGA的UART系统设计

Design of UART Based on DSP and FPGA

基于DSP和FPGA的异步串口UART的工作原理和软、硬件设计。采用DSP作为处理器,将UART的核心功能嵌入到PFGA内部,并利用DSP的EDMA功能完成FPGA内部FIFO和DSP内部RAM中乒乓缓冲器之间的数据传输。使用VHDL硬件描述语言对PFGA进行编程,并在Quartus II 7.2中完成了时序仿真,最后在Altera的CYCLONE系列FPGA上下载实现,验证了用FPGA实现串口通信的可行性。

This paper introduces the working strategy, software and hardware designs of UART based on DSP and FPGA. In the system, DSP is used to be a processor and the core function of UART is embedded into FPGA. In addition, the ping-pong buffers are designed in the RAM of DSP and the EDMA （Enhanced Direct Memory Access） is used for transmitting the data between the FIFOs and ping-pong buffers. PFGA is programmed with VHDL hardware description language. Time series simulation is completed in Quartus II 7.2. Finally the program is loaded into the FPGA device Cyclone produced by the Altera company, and the feasibility of using FPGA to realize UART communication is demonstrated.