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异步控制电路设计方法

Design of asynchronous control circuit
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摘要 以异步电路的基本类型为基础,依据异步控制电路的基本描述机制将已有的异步电路设计方法划分为基于CSP的设计方法、基于Petri网的设计方法以及基于有限状态机的设计方法3类,并对这3类设计方法的优缺点进行比较;针对已有的逻辑综合实现技术与直接映射实现技术的优势与不足,提出了异步控制电路设计方法的发展趋势。 Application of asynchronous circuits has become one of the most promising directions in circuit design because asynchronous circuits are free of clock skews.On the basis of analyzing all kinds of asynchronous circuits,the specification of asynchronous control circuits is summarized,the design methods of asynchronous control circuits is deeply demonstrated and their advantages and disadvantages are compared.Making full use of logic synthesis and direct mapping,an improved design cycle of asynchronous control circuits is also addressed.
出处 《计算机工程与设计》 CSCD 北大核心 2009年第9期2085-2088,共4页 Computer Engineering and Design
基金 国家自然科学基金项目 (90407022)
关键词 异步控制电路 描述机制 逻辑综合 直接映射 设计流程 asynchronous control circuit specification method logic synthesis direct mapping design cycle
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参考文献14

  • 1Sutherland I E,Ebergen J.Computers without clocks: How a rendezvous circuit works[J].Scientific American,2002,287(2):62-69.
  • 2刘勇攀,罗嵘,史峥,杨华中,汪蕙,严晓浪.异步电路的设计方法及其应用[J].微电子学,2002,32(6):457-461. 被引量:2
  • 3Myers C J.Asynchronous circuit design [M]. John Wiley & Sons, 2001.
  • 4Edwards D, Bardsley A.Balsa: An asynchronous hardware synthesis language[J].Computer Journal, 2002,45(1): 12-18.
  • 5Kessels J, Peeters A. The Tangram framework: Asynchronous circuits for low power [C]. Proc of Asia and South Pacific Design Automation Conference,2001:255-260.
  • 6Mallon W C, Udding J T.Construction of an operational semantics for D1-algebra [D].Tech Rep CSN 9710, Dept of Computer Science, Univ of Groningen, 1997.
  • 7Renaudin M,Vivet R,Robin F.A design framework for asynchronous/synchronous circuits based on CHP to HDL translation [C].Proc of Intemational Symposium on Advanced Research in Asynchronous Circuits and Systems, 1999:135-144.
  • 8Doug Edwards,Will Toms.Design, automation and test for asynchronous circuits and systems[R].3rd ed. ACiD-WG report, 2004.
  • 9Yakovlev A V, Koelmans A M,Lavagno L.High-level modeling and design of asynchronous interface logic[J]. IEEE Design & Test of Computers, 1995,12(1):32-40.
  • 10Chu T A.Synthesis of self-timed VLSI circuits fxom graph-theoretic specifications [D]. MIT Laboratory for Computer Science, 1987.

二级参考文献14

  • 1[1]Rotem S, Stevens K. RAPPID: an asynchronous in struction length decoder [A]. The Fifth Int Symp Advaned Research in Asynchronous Circuits and Systems [C]. 1999.
  • 2[2]Huffman D A. The synthesis of sequential switching circuits [M]. Addison-Wesley, 1964.
  • 3[3]Nowick S M. Automatic synthesis of burst-mode asynchronous controllers [D]. 1993.
  • 4[4]Molnar C E, Fang T-P, Rosenberger F U. Synthesis of delay-insensitive modules [A]. In: Fuchs H ed. Proc Conf VLSI [C]. Chapel Hill, 1985. 67-86.
  • 5[5]Martin A J. Programming in VLSI: from communicating processes to delay-insensitive circuits [A]. In: Hoare C A R ed, UTYear of Programming Series[C]. Addison-Wesley, 1990. 1-64.
  • 6[6]Saito H, Kondratyev A, Cortadella J, et al. What is the cost of delay insensitivity? [A]. 1999 IEEE/ACM Int Conf [C]. 1999. 316-323.
  • 7[7]Muller D E, Bartky W C. A theory of asynchronous circuits [M]. Hardward University, 1959.
  • 8[8]Beerel P A. Automatic gate-level synthesis of speed independent circuits [A]. Proc IC CAD [C]. 1992.
  • 9[9]Kondratyev A, Kishinevsky M, Yakovlev A. Hazardfree implementation of speed-independent circuits [J]. IEEE Trans CAD, 1998; 17 (9): 749-771.
  • 10[10]Moon C W, Stephan P R. Synthesis of hazard-free asynchronous circuits from graphical specifications[A]. Proc ICCAD-91 [C]. New York: IEEE Computer Society Press, 1991. 322-325.

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