摘要
高清晰电视(HDTV)和无线通信网络的发展,对转换器速度和精度提出了更高的要求。基于新型传输门(TG)结构组成的电流源单元矩阵和译码逻辑电路,提出一种适用于高清晰视频使用的高速8位CMOS电流舵数/模转换器(CS-DAC)。应用电流源单元矩阵结构和传输门结构的译码电路,有效减少了毛刺等干扰信号;TG结构设计的电路使晶体管数量和电路的延时显著减少;基于0.25μm CMOS技术的DAC电路设计,功耗仅为21 mW,采样率达到1.5 GHz。仿真结果表明,电路的积分线性误差(INL)范围为-2^+2 LSB;微分线性误差(DNL)为-1^+4 LSB。
With the development of HDTV and wireless communication network, the requirement is higher for speed and precision of digital - to - analog converter. Based on internal circuits cells consisted of a new type of Transmission Gate （TG） structures and combinational logics decoders,this paper presents a 2 G- Sample 8- bit CMOS Current Steering Digital- to Analog Converter （CS - DAC） for HI） video applications. A current cell matrix configuration and parallel decoding circuit allowlow glitch energy. With TG circuits, the number of transistors and the delay time skew in the outputs of decoder are significantly reduced. The power consumption is only 21 mW and the conversion rate of 2 GHz is obtained in 0.25 μm CMOS design. The simulation shows that Integral Non - Linearity （INL） of -2- ＋2 LSB and Differential Non - linearity （DNL） of -1-＋4 LSB are obtained.
出处
《现代电子技术》
2009年第10期27-30,共4页
Modern Electronics Technique
基金
电子测试技术国家重点实验室资助项目(9140C1204040705)
关键词
高速
数/模转换器
电流舵
CMOS
high speed
digital - to - analog converter
current - steering
CMOS
