基于VHDL的数字电压表设计及实现

Design and Realization of the Digital Voltmeter Based on VHDL

通过对FPGA芯片进行VHDL语言编程,并在EDA实验箱上下载、调试,实现了数字电压表的功能。具体方案是利用状态机的方法对ADC0809进行采样控制,并将采样后的信号转换为BCD码,经译码后再通过三位数码管进行显示。该设计突出了VHDL语言良好的电路描述和建模能力,从而大大简化了硬件设计任务,提高了设计效率。由于VHDL语言的灵活性和可扩展性以及EDA实验箱的反复利用性,减小了实验成本。

By programming the FPGA with VHDL and debugging on the EDA experimental box, basic function of the digital voltmeter is realized. Firstly, sampling control of the ADC0809 is carried out through the state machine method, then the sampled signal is converted to the BCD code. After decoding the signal is d/splayed by LED with three bits. The favorable ability of VHDL on circuit de- scription and modeling is utilized in the design. Accordingly, hardware design is greatly simplified and efficiency of the scheme is improved. Because of the flexibility and expansibility of VHDL and reusing of the EDA experimental box, positivity and creativity of the students are inspired and the cost is reduced.