摘要
嵌入式系统设计中,CPU小系统的可靠运行是首要目标。当小系统出现故障时,准确定位故障源非常关键,能大大降低维护成本。传统设计方法中,较少考虑系统可测性的需求,故障定位效率低。文章提出了一种CPU小系统故障定位方法,通过在CPLD的逻辑设计中增加对CPU小系统关键信号的检测,并在Bootrom软件中增加相应模块的测试功能,实现了在系统启动过程中对各种潜在故障点的检测,满足快速定位故障源的要求。
A simple CPU system working reliability is important in embedded system design. The cost of maintain can be saved if the fault could be located fast. With less consideration about the demand of testability in tradition, so it is inefficient to locate fault. This article introduces a new method of fault location for simple CPU system, which adds testing steps for key signal of the system in CPLD logic design, and also adds corresponding test functions in Bootrom software. This method can test all possible faults during system starting, meeting the demand of fast locating fault.
出处
《轻工机械》
CAS
2009年第3期64-66,70,共4页
Light Industry Machinery
关键词
CPU小系统
可测性设计
故障定位
simple CPU system
design for test(DFT)
fault location