摘要
构建了基于PowerPC405处理器的SoC软硬件协同验证平台。该平台使用层次化的设计方法,在统一平台架构下支持RTL和TLM两种不同抽象层次的虚拟原型仿真,兼顾了仿真精度和速度的要求。平台中提供了完整的开发工具和基础架构,支持以C语言测试程序作为输入的验证流程自动化,可有效地提高验证效率。
This paper describes the design of a SoC hardware/software co- verification platform, which is based on the layered approach. The platform can obtain both high accuracy and simulation speed by supporting RTL and TLM models in a uniform architecture. In order to improve the verification efficiency, the platform provides the basic development framework and toolset to support verification process automation.
出处
《微处理机》
2009年第2期11-14,共4页
Microprocessors
