一种数字信号处理器地址产生单元的设计

A Design of Address Generation Unit of Digital Signal Processor

针对数字信号处理中常用的循环寻址、位反序寻址等寻址方式,提出了一种数字信号处理器专用地址产生单元的设计实现,并对电路的结构做了进一步优化.仿真结果表明,提出的设计在不影响速度的前提下实现了面积和功耗的大幅减少,从而有效地提高了处理器的性能.

This paper presents a design of a DSP （Digital Signal Processor） AGU （Address Generation Unit） that supports bit-reverse and circular addressing mode. Simulation results show that the design has realized a great decrease on area and power consumption while the speed of the AGU remains unaffected, so the performance of the processor to get enhanced effectively.