基于脉冲寄存器的高性能低功耗电路设计实现

The High Performance and Low-Power Circuit Design Based on Pulse Latch

提出了一种高速低功耗脉冲寄存器的设计方法,并将其应用在高速DSP地址生成单元的设计中.仿真结果表明,文中提出的脉冲寄存器结构较传统的寄存器在速度、面积、功耗等指标上均有显著的提高.

This paper proposes a high speed and low power pulse latch design, and integrates it to high speed DSP address generator. Through the analysis and simulation result, the pulse latch design is proved to have greater improvement in speed, area and power over conventional flip-flops.