摘要
详细介绍了用VHDL语言设计可逻辑综合的32位嵌入式微处理器及其实现过程.微处理器指令系统构架采用MIPS结构,设计上使用结构化编程方法,将微处理器内核按照功能划分为不同的模块,采用VHDL语言设计每一个模块的内部功能和外围接口.所有的功能模块组合起来后,通过EDA工具进行微处理器内核的逻辑综合和功能仿真.最后,在可编程逻辑器件上实现完整的微处理器内核.
This paper discribes a synthetic MIPS architecture microprocessor and its implementation in detail for a embedded system. Making use of the structure programming method and the MIPS instruction system architecture, the design divides the microprocessor into different function unites, and write VHDL codes to describe internal function and extenal ports of each unite. Microprocessor core is simulated and synthesised by EDA tools after combining all unites. In the end, miroprocessor is implemented in the programmable logic device.
出处
《河南科技学院学报》
2009年第1期47-51,共5页
Journal of Henan Institute of Science and Technology(Natural Science Edition)
关键词
EDA技术
VHDL
微处理器
FPGA
EDA Technology
VHSIC Hardware Description Language
Microprocessor
FPGA
