数据并行计算机体系结构建模

Data Parallelism Computer Architecture Structure Modeling

分析并研究国内外典型的数据并行计算机体系结构建模,结合LS-MPP计算机的体系结构,提出一种基于二维阵列结构的SIMD计算机抽象模型。通过对逻辑部件的时序分析,实现关于该模型的解释型SIMD仿真器,在进行细粒度时钟精确级建模时兼顾仿真效率。仿真器测试结果表明,该抽象模型具有一定应用价值。

Aiming at the analysis and research of domestic and international typical architecture of data parallelism computer, closely consulting the architecture of LS-MPP computer in our country, this paper proposes a kind of abstract model of SIMD computer based on two-dimensional array structure. Through an analysis of time sequence of each logic part implements interpretive instruction SIMD simulator, it gives consideration to simulating efficiency while carrying on one grade of modeling of detailed grain size clock. The simulator test results indicate that the simulator has certain application value.