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低功耗测试研究进展 被引量：2

Research on progress of low-power testing
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摘要 随着CMOS器件进入纳米时代,测试时产生的功耗大大超过系统正常工作时的功耗,测试功耗已成为影响芯片设计的重要因素,芯片测试时的低功耗技术也已经成为当前学术界和工业界的一个研究热点。文章首先介绍了低功耗测试技术的基本概念,分析测试中的静态功耗和动态功耗;其次,分类介绍目前常用的测试功耗控制技术;然后,对研究热点的变化和技术发展的趋势做出说明。 As CMOS device dimensions enter the nanometer era, test power has become much higher than the power produced in the circuit＇s functional mode, so test power is going to have a very important impact on VLSI design, and it has already been a hot topic in the research and industry areas. In this paper, some concepts of low-power testing are introduced, and leakage power and dynamic power are explained respectively. Some primary low-power techniques are described, and the transformation of the research focus and the trend of technical development are also discussed.
作者 方芳 王伟 王杰 陈田 杨年宏
机构地区 合肥工业大学计算机与信息学院 合肥工业大学管理学院 中国科学院计算技术研究所系统结构重点实验室
出处 《合肥工业大学学报（自然科学版）》 CAS CSCD 北大核心 2009年第6期769-773,785,共6页 Journal of Hefei University of Technology：Natural Science
基金 国家863重点基础研究发展计划资助项目(2007AA01Z113) 中国科学院计算技术研究所系统结构重点实验室开放课题基金资助项目(ICT-ARCH200704) 合肥工业大学科学研究发展基金资助项目(070501F) 高等学校博士学科点专项科研新教师基金资助项目(200803591033) 中国博士后科学基金资助项目(20080430050)
关键词 测试功耗 低功耗 芯片设计 test power low-power chip design
分类号 TP391.76 [自动化与计算机技术—计算机应用技术]
  • 相关文献

参考文献25

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共引文献13

同被引文献22

  • 1王义,傅兴华.低功耗单输入跳变测试理论的研究[J].微电子学与计算机,2009,26(2):5-7. 被引量：4
  • 2王祚栋,魏少军.SOC时代低功耗设计的研究与进展[J].微电子学,2005,35(2):174-179. 被引量：19
  • 3冯建科,张生文,郭士瑞.VXI数模混合信号集成电路测试系统[J].电子测量与仪器学报,2005,19(2):52-57. 被引量：6
  • 4雷绍充,邵志标,梁峰.生成确定性测试图形的内建自测试方法[J].西安交通大学学报,2005,39(8):880-884. 被引量：5
  • 5向东,李开伟.低成本的两级扫描测试结构[J].计算机学报,2006,29(5):786-791. 被引量：5
  • 6Zhou Bin, Ye Yizheng, Li Zhaolin, et al. A new low power test pattern generator using a variable-length ring counter[C]. IEEE 10th Int'l Symposium on Quality Electronic Design, 2009: 248-252.
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  • 8Hu Zhengwei, Yang Xing, Xie Zhiyuan. Design of RSIC test sequence based on ALFSR generation circuit[C]. IEEE Computer Society, International Symposium on Information Science and Engieering, 2008: 317-320.
  • 9Ye Bo, Li Tianwang, Zhao Qian. A low power test pattern generation for built-in self-test based circuits[J], International Journal of Electronics, 2011, 98(3) : 301-309.
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引证文献2

合肥工业大学学报（自然科学版）
2009年 第6期

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