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集成电路封装用低温低介陶瓷材料的研制 被引量:1

The Development of Ceramic Material with Low Sintering Temperature and Low Dielectric Constant for IC Packing
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摘要 简要地叙述了国家八五攻关项目“85-705”中“低温低介电常数陶瓷材料” s This paper has briefly described the development process and main technical problems of low dielectric constant ceramics material of the key task “85-705' Subject of the national eighth five-year plan.
作者 储章生
出处 《江苏陶瓷》 CAS 1998年第2期10-11,共2页 Jiangsu Ceramics
关键词 集成电路 封装 陶瓷材料 介电陶瓷 IC Packing Low temperature and dielectric constant Ceramic material
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同被引文献27

  • 1王少洪,周和平,陈克新.高频片式电感用堇青石陶瓷材料的低温烧结和性能[J].稀有金属材料与工程,2005,34(2):325-328. 被引量:6
  • 2靳正国,徐廷献,胡宗民,高尚通,王文琴,刘志平.莫来石基板陶瓷的组成对结构与性能的影响[J].硅酸盐学报,1996,24(1):20-27. 被引量:5
  • 3董兆文,王岩.低温共烧玻璃陶瓷基板材料的研究[J].电子元件与材料,1996,15(6):28-32. 被引量:7
  • 4Yue Zhen- Xing, Zhou Ji. Low- temperature Sinterable Cordierite Glass-ceramics for High- frequency Multilayer Chip Inductors [J]. J. Mater. Sci. Lette.,2000, (19):213-215.
  • 5Hsu Jen-Yan,Lin Hon-Chin,Shen Hon-Dar, et al.High Frequency Multilayer Chip Inductor [J].IEEE. Transaction on Magnetics, 1997, 33(5) : 3325 - 3327.
  • 6Masami Sasaki, Hiroshige Okawa,Yasuyoshi Suzuki, et al.Non-magnetic Ceramics and Ceramic Multilayer Parts: US,6008151[P]. 1998- 06- 03.
  • 7Jeana J H, Gupta T K. Design of Low Dielectric Glass^+ Ceramics tor Multilayer Ceramic Substrate [J]. IEEE.Trans. Compon, Hybids, Manut. Technol, 1994, 17(2) :228-233.
  • 8Jean J H, Kuan T H. Compositional Design and Properties of a Low-k Silica Dielectric for Multilayer Ceramic Substrate [J ]. Jpn.J. Appl. Phy, 1995(34) : 1901 - 1905.
  • 9Markstein Howard W. A Wide Choice of Materials for MCMs [J]. Electronic Packaging & Production, 1997,37(3):34-38.
  • 10Coterene E. Ceramic Multichip Module and High Density Thick Film Interconnect Technology [J].Electronic Packaging & Production, 1998,38(4) : 43 - 48.

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